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Trikarenos (TRIK)

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  • Kai Berszin
Last Updated10/12/2025, 12:48:54 PM
Last AuthorKai Berszin

Trikarenos is a custom RISC-V based MCU containing a triple core TMR setup as well as ECC memory.
The MCU is made with fault redunancy in radiation heavy environments - namely space - in mind.
It was developed by the Integrated Systems Laboratory by Michael Rogenmoser.

More information about the ASIC can be found in the IIS Chip Gallery.